1. Since flip-flop or latches is the basic unit for computer memory, i'd like to ask some sources to study more about flip-flop waveform including: SR latches, D-latches, JK latches, master-slaves and other waveform. Any source will helps me a lot.
There's another problem, since i learned about edge sensitivity: how to draw either postivite or negative edge waveform according to clock pulse, what about low level and high level, i have completely no idea at all.

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3. Originally Posted by cdopener
i'd like to ask some sources to study more about flip-flop waveform including: SR latches, D-latches, JK latches, master-slaves and other waveform.
i'm not sure what you are asking.
the output waveform of the above devices, their function, or how they work.
first of all the sr is not a latch it is a flip-flop, it switches state with each clock pulse,it has two outputs (Q) and (notQ), it's output is a square wave at 1/2 the frequency of the clock.

the d-latch is also a flip-flop and is identical to the sr except it has only one output (Q), the output is also 1/2 the frequency of the clock

the JK and master slave you have messed up.
J and K are inputs to the master-slave flip-flop
it is called a JK master-slave flip-flop. it can function as a latch or a flip-flop depending on the J/K inputs
let me consult some text . . .
JK's are edge triggered meaning as the clock rises to + or falls to- it toggles as defined by the J and K inputs.
if J=0 and K=0 then on the trigger it won't change state.
if J=1 and K=0 then it SETS meaning the output goes to 1.
if J=0 and K=1 then it RESETS meaning the output goes to zero.
if j=1 and k=1 then it toggles (changes state)

if you need clarification then post.

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